enum Instructions
Defined in:
Enum Members
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LDX_IMM =
162_u8
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This instruction will load an immediate byte into the X register.
This instruction is 2 cycles and 2 bytes and operate as follows:
Cycle 1: Fetch Opcode Cycle 2: Read byte and load into X
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LDX_ZERO =
165_u8
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This instruction will load a byte into the X register given a higher byte of a zero page address
This instruction is 3 cycles and 2 bytes
Cycle 1 Fetch Opcode Cycle 2 Read higher byte from program Cycle 3 Load from zero page address into X
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LDX_ABS =
174_u8
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This instruction will load a byte from a given 16-bit memory address into the X register.
This instruction is 4 cycles and 3 bytes and operate as follows:
Cycle 1: Fetch Opcode Cycle 2: Read ADL Cycle 3: Read ADH Cycle 4: Load 8-bit data of address 0x{ADL}{ADH} into X
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LDX_ABS_Y =
190_u8
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This instruction will load a byte from a given 16-bit memory address, indexed to Y
This instruction is 4 cycles, 3 bytes and operates as follows:
Cycle 1: Fetch Opcode Cycle 2: Read ADL Cycle 3: Read ADH Cycle 4: Load 8-biot data of address 0x{ADL}{ADH}+Y
X and Y registers are known as index registers. They are used to offset an address, such as indexing into an array. Example:
arr = ['a', 'b', 'c'] arr[1] #'b'
The indexing is easily done with the X and Y registers
ldx #1 lda $5000, X ;Assuming that the array starts at address 0x5000, we index into 0x5001 using X
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LDX_ZERO_Y =
182_u8
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This instruction will load a byte from a given 16-bit memory address, indexed to Y
This instruction is 4 cycles, 2 bytes and operates as follows:
Cycle 1: Fetch Opcode Cycle 2: Read ADH Cycle 3: Load 8-bit data of address 0x00{ADH}+Y
X and Y registers are known as index registers. They are used to offset an address, such as indexing into an array. Example:
arr = ['a', 'b', 'c'] arr[1] #'b'
The indexing is easily done with the X and Y registers
ldx #1 lda 50, X ;Assuming that the array starts at address 0x50, we index into 0x51 using X
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STX_ZERO =
134_u8
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This instruction will store the value in register X in an address in the zero page
This takes two bytes and three cycles
Cycle 1 Fetch Opcode Cycle 2 Read ADH Cycle 3 Store contents of X at 0x00{ADH} where ADH is the address within the zero page, and 0x00 is the lower byte of the address
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STX_ZERO_Y =
134_u8
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This instruction will store the value in register X in an address in the zero page
This takes two bytes and three cycles
Cycle 1 Fetch Opcode Cycle 2 Read ADH Cycle 3 Store contents of X at 0x00{ADH} where ADH is the address within the zero page, and 0x00 is the lower byte of the address
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STX_ABS =
142_u8
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This instruction will store the value in register X in an absolute address
This takes three bytes and 4 cycles to complete
Cycle 1 Fetch Opcode Cycle 2 Read ADL Cycle 3 Read ADH Cycle 4 Store contents of X at 0x{ADL}{ADH}
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STY_ZERO =
132_u8
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This instruction will store the value in register Y in an address in the zero page
This takes two bytes and three cycles
Cycle 1 Fetch Opcode Cycle 2 Read ADH Cycle 3 Store contents of Y at 0x00{ADH} where ADH is the address within the zero page, and 0x00 is the lower byte of the address
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STY_ZERO_X =
148_u8
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This instruction will store the value in register Y in an address in the zero page indexed to X
This takes two bytes and four cycles
Cycle 1 Fetch Opcode Cycle 2 Read ADH Cycle 3 Cycle 4 Store contents of Y at 0x00{ADH}+X where ADH is the address within the zero page, and 0x00 is the lower byte of the address and X is the contents of X register
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STY_ABS =
140_u8
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This instruction will store the value in register Y in an absolute address
This takes three bytes and 4 cycles to complete
Cycle 1 Fetch Opcode Cycle 2 Read ADL Cycle 3 Read ADH Cycle 4 Store contents of Y at 0x{ADL}{ADH}
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LDY_IMM =
160_u8
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This instruction will load a byte into the Y register.
This instruction is 2 cycles and 2 bytes and operate as follows:
Cycle 1: Fetch Opcode Cycle 2: Read byte and load into Y
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LDY_ZERO =
164_u8
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This instruction will load a byte into the Y register given a higher byte of a zero page address
This instruction is 3 cycles and 2 bytes
Cycle 1 Fetch Opcode Cycle 2 Read higher byte from program Cycle 3 Load from zero page address into Y
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LDY_ZERO_X =
180_u8
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This instruction will load a byte into the Y register given a higher byte of a zero page address
This instruction is 4 cycles and 2 bytes
Cycle 1 Fetch Opcode Cycle 2 ADH = Read higher byte from program Cycle 3 Addr = 0x00{ADH} + X Cycle 4 Load contents of Addr into Y
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LDY_ABS_X =
188_u8
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This instruction will load a byte from a given 16-bit memory address into the Y register.
This instruction is 4 cycles and 3 bytes and operate as follows:
Cycle 1: Fetch Opcode Cycle 2: Read ADL Cycle 3: Read ADH Cycle 4: Increment address by X Cycle 4: Load 8-bit data of address 0x{ADL}{ADH}+X into Y
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LDY_ABS =
172_u8
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This instruction will load a byte from a given 16-bit memory address into the Y register.
This instruction is 4 cycles and 3 bytes and operate as follows:
Cycle 1: Fetch Opcode Cycle 2: Read ADL Cycle 3: Read ADH Cycle 4: Load 8-bit data of address 0x{ADL}{ADH} into Y
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LDA_IMM =
169_u8
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This instruction will load a byte into the A register.
This instruction is 2 cycles and 2 bytes and operate as follows:
Cycle 1: Fetch Opcode Cycle 2: Read byte and load into A
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LDA_ZERO =
165_u8
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This instruction will load a byte into the A register given a higher byte of a zero page address
This instruction is 3 cycles and 2 bytes
Cycle 1 Fetch Opcode Cycle 2 Read higher byte from program Cycle 3 Load from zero page address into accumulator
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LDA_ABS =
173_u8
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This instruction will load a byte from an absolute address into the accumulator
This instruction is 4 cycles and 3 bytes
Cycle 1 Fetch Opcode Cycle 2 Read lower byte Cycle 3 Read higher byte Cycle 4 Load byte from given address into accumulator
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STA_ZERO =
133_u8
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This instruction will store the value in the accumulator (register A) in an address in the zero page
This takes two bytes and three cycles
Cycle 1 Fetch Opcode Cycle 2 Read ADH Cycle 3 Store contents of A at 0x00{ADH} where ADH is the address within the zero page, and 0x00 is the lower byte of the address
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STA_ABS =
141_u8
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This instruction will store the contents of the accumulator into an absolute address
This instruction is 4 cycles and 3 bytes
Cycle 1 Fetch Opcode Cycle 2 Read lower byte Cycle 3 Read higher byte Cycle 4 Store contents of accumulator into given address
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ADC_IMM =
105_u8
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This instruction will add an immediate value into the accumulator (A register) with a carry bit. If the operation overflows beyond 255, then the result with a carry bit of 1 means to interpret the results as 255 + A.
This instruction takes two bytes and takes three cycles to complete.
Cycle 1 Fetch Opcode Cycle 2 Read byte from program Cycle 3 Add read byte to A, set carry bit if necessary
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ADC_ZERO =
101_u8
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This instruction will add the contents of an address in the zero page to the accumulator.
This instruction takes 3 bytes and takes 4 cycles to complete.
Cycle 1 Fetch Opcode Cycle 3 Read ADH Cycle 4 Add contents of 0x00{ADH} to register A
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ADC_ABS =
109_u8
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This instruction will add the contents of an absolute memory location into the accumulator (A register) with a carry bit.
If the operation overflows beyond 255, then the result with a carry bit of 1 means to interpret the results as 255 + A.
This instruction takes 3 bytes and takes 4 cycles to complete.
Cycle 1 Fetch Opcode Cycle 2 Read ADL Cycle 3 Read ADH Cycle 4 Add contents of 0x{ADL}{ADH} to register A
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ADC_INDIRECT_X =
97_u8
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This instruction will add the contents of an indirect memory location, from the zero page given by the instruction's opcode with X added, into the accumulator (A register) with a carry bit.
If the operation overflows beyond 255, then the result with a carry bit of 1 means to interpret the results as 255 + A.
This instruction takes 2 bytes and takes 6 cycles to complete.
Cycle 1 Fetch Opcode Cycle 2 Read ADH Cycle 3 ADDR = 0x00{ADH}+X Cycle 4 Get ADL from ADDR Cycle 5 Get ADH from ADDR Cycle 6 Add contents of 0x{ADL}{ADH} to register A
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ADC_Y_INDIRECT =
113_u8
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This instruction will add the contents of an indirect memory location, from the zero page given by the instruction's opcode, followed by Y being added to it, into the accumulator (A register) with a carry bit.
This will take a zero page address for loading an absolute address, indexed to Y
If the operation overflows beyond 255, then the result with a carry bit of 1 means to interpret the results as 255 + A.
This instruction takes 2 bytes and takes 6 cycles to complete.
Cycle 1 Fetch Opcode Cycle 2 Read ADH, ADDR = 0x00{ADH} Cycle 3 Get ADL from ADDR Cycle 4 Get ADH from ADDR Cycle 5 ADDR = 0x{ADL}{ADH}+Y Cycle 6 Add contents of ADDR to register A
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SBC_IMM =
233_u8
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This instruction will subtract an immediate value from the accumulator (A register) with a carry bit.
If the operation underflows below 0, then the result with a carry bit of 1 means to interpret the results as 255 - A.
This instruction takes two bytes and takes three cycles to complete.
Cycle 1 Fetch Opcode Cycle 2 Read byte from program Cycle 3 Sub read byte from A, set carry bit if necessary
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SBC_ZERO =
229_u8
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This instruction will subtract the contents of an address in the zero page from the accumulator.
If the operation underflows below 0, then the result with a carry bit of 1 means to interpret the results as 255 - A.
This instruction takes 3 bytes and takes 4 cycles to complete.
Cycle 1 Fetch Opcode Cycle 3 Read ADH Cycle 4 Subtract contents of 0x00{ADH} to register A
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SBC_ABS =
237_u8
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This instruction will add the contents of an absolute memory location into the accumulator (A register) with a carry bit.
If the operation overflows beyond 255, then the result with a carry bit of 1 means to interpret the results as 255 + A.
This instruction takes 3 bytes and takes 4 cycles to complete.
Cycle 1 Fetch Opcode Cycle 2 Read ADL Cycle 3 Read ADH Cycle 4 Subtract contents of 0x{ADL}{ADH} to register A
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SBC_INDIRECT_X =
225_u8
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This instruction will subtract the contents of an indirect memory location, from the zero page given by the instruction's opcode with X added, from the accumulator (A register) with a carry bit.
If the operation overflows beyond 255, then the result with a carry bit of 1 means to interpret the results as 255 + A.
This instruction takes 2 bytes and takes 6 cycles to complete.
Cycle 1 Fetch Opcode Cycle 2 Read ADH Cycle 3 ADDR = 0x00{ADH}+X Cycle 4 Get ADL from ADDR Cycle 5 Get ADH from ADDR Cycle 6 Subtract contents of 0x{ADL}{ADH} from register A
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SBC_Y_INDIRECT =
241_u8
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This instruction will subtract the contents of an indirect memory location, from the zero page given by the instruction's opcode, followed by Y being added to it, from the accumulator (A register) with a carry bit.
This will take a zero page address for loading an absolute address, indexed to Y
If the operation overflows beyond 255, then the result with a carry bit of 1 means to interpret the results as 255 + A.
This instruction takes 2 bytes and takes 6 cycles to complete.
Cycle 1 Fetch Opcode Cycle 2 Read ADH, ADDR = 0x00{ADH} Cycle 3 Get ADL from ADDR Cycle 4 Get ADH from ADDR Cycle 5 ADDR = 0x{ADL}{ADH}+Y Cycle 6 Subtract contents of ADDR from register A
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JSR =
32_u8
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This will read a word from the program and push the current program counter onto the stack then setting the program counter to the acquired word.
This instruction is 7 cycles and 3 bytes
Normally in the hardware, the lower byte read is called ADL and the higher byte read is called ADH In the hardware, we also have PCH (program counter high) and PCL (program counter low) The hardware will spend two cycles to set the ADL->PCL and ADH->PCH
Vocabulary:
ADL : Target Address Low ADH : Target Address high PCL : Program Counter low PCH : Program Counter high AD : Target Address PC : Program Counter
So the hardware is really like this:
Cycle 1 Fetch Opcode Cycle 2 Read ADL Cycle 3 Push PCH Cycle 4 Push PCL Cycle 5 Fetch ADH Cycle 6 ADL->PCL Cycle 7 ADH->PCH
Source: http://archive.6502.org/datasheets/synertek_programming_manual.pdf p118
Our cycles are like this:
Cycle 1 Fetch Opcode Cycle 2 Read ADL Cycle 3 Read ADH Cycle 4 AD = ADH | ADL Cycle 5 Push PCH Cycle 6 Push PCL Cycle 7 AD->PC
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RTS =
96_u8
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This will return from a subroutine by popping a word off the stack and setting the program counter to it + 1
This instruction is 6 cycles and 1 byte.
Cycle 1 Fetch Opcode Cycle 2 Pop ADL Cycle 3 Pop ADH Cycle 4 AD = ADH | ADL Cycle 5 AD->PC Cycle 6 PC->PC+1
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SEC =
56_u8
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This instruction will set the carry flag to 1
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CLC =
24_u8
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This instruction will clear the carry flag to 0
Instance Method Summary
- #adc_abs?
- #adc_imm?
- #adc_indirect_x?
- #adc_y_indirect?
- #adc_zero?
- #clc?
- #jsr?
- #lda_abs?
- #lda_imm?
- #lda_zero?
- #ldx_abs?
- #ldx_abs_y?
- #ldx_imm?
- #ldx_zero?
- #ldx_zero_y?
- #ldy_abs?
- #ldy_abs_x?
- #ldy_imm?
- #ldy_zero?
- #ldy_zero_x?
- #rts?
- #sbc_abs?
- #sbc_imm?
- #sbc_indirect_x?
- #sbc_y_indirect?
- #sbc_zero?
- #sec?
- #sta_abs?
- #sta_zero?
- #stx_abs?
- #stx_zero?
- #stx_zero_y?
- #sty_abs?
- #sty_zero?
- #sty_zero_x?